Conventionally, an electronic circuit with an automatic gain control loop for an input amplifier can be arranged in a data or control radiofrequency signal receiver or in any other type of data receiver or transmitter. When data signals are received at a determined carrier frequency, these signals are picked up by an antenna and shaped in a conventional shaping stage. The shaped signals are supplied to an input amplifier of the electronic circuit.
Normally, the input amplifier output can be connected to a mixer unit or sometimes directly to a demodulation unit or to an analogue-digital converter. The mixer unit can convert the frequency of the signals picked up by the antenna and amplified by the input amplifier by means of at least one oscillating signal from a local oscillator. The intermediate signal or signals supplied at the mixer unit output may thus be converted to a low frequency, and even directly into base band prior to a data or control signal demodulation operation in a demodulator. In order to be able to demodulate the data from the intermediate signals properly, the amplitude of the signals amplified by the input amplifier must be adapted in the automatic gain control loop of the electronic circuit. The amplitude adaptation also takes account of the fact that the input amplifier must be capable of operating in a linear operating mode.
The amplitude of the signals supplied to the input amplifier may be too large, which generates a significant variation margin in the input signals. In these conditions, the input amplifier, which may be a VGA or LNA amplifier, may become non-linear, which is undesirable for the electronic circuit to be able to operate properly. Thus, a variable shunt resistance may be placed at the inputs of the input amplifier to easily attenuate the amplitude of the input signals. This enables the amplifier to operate in a linear manner. The resistive value of the variable resistance may be controlled in an automatic gain control loop of the electronic circuit, which depends on the amplitude level at the input amplifier output compared to a desired reference amplitude level.
FIG. 1 shows a conventional electronic circuit 1, which is provided with a means of attenuating at least one input signal VIN of an input amplifier 2. In this example of the state of the art, a sinusoidal voltage VS is shown for supplying at least one input signal VIN through a series resistance RS to the input amplifier 2. However, it is quite clear that the input signal or signals preferably originate from signals picked up by an antenna which is not shown.
The gain of input amplifier 2, which may be a VGA amplifier, may be adjusted in an automatic gain control loop in two ways. The gain of amplifier 2 may thus be adjusted by changing the actual gain of VGA amplifier 2 and also by adjusting a variable input resistance RIN, which may be formed, for example, of one or several CMOS transistors arranged in parallel. Reducing the resistive value of the input resistance also reduces the amplitude of the input signal and thus of the input amplifier gain. In the case of the CMOS transistors used and not shown, the drain and source terminals are connected to the input of input amplifier 2 and the earth terminal. The gate of each transistor is controlled by an adaptation signal in an automatic gain control loop.
The automatic gain control loop is thus formed of input amplifier 2, a peak detector 3, an amplifier-comparator 4 or a transconductance amplifier, a first drive component 6 and a second drive component 7. The output signal VOUT of the input amplifier, which is an alternating signal, generally depends on the carrier frequency of the incoming signals. The output signal is supplied to the conventional peak detector 3 to supply at output a rectified signal VP, which may be continuous, and which represents the amplitude of input signal VIN amplified by input amplifier 2. The rectified signal VP may be stored in a capacitor CP of peak detector 3.
Amplifier-comparator 4 is connected to the peak detector to receive rectified signal VP. This amplifier-comparator 4 is arranged to determine an error between the rectified signal VP representing the amplitude of signals VOUT amplified by input amplifier 2, and a reference signal VR, which is representative of a defined amplitude threshold. The rectified signal and the reference signal are generally a rectified voltage VP and a reference voltage VR supplied to the input of amplifier-comparator 4. Rectified voltage VP is supplied to the positive input, whereas reference voltage VR is supplied to the negative input of amplifier-comparator 4.
According to the determined error between the two compared voltages, an adaptation signal in the form of an adaptation current or voltage VAGC is supplied by amplifier-comparator 4. An integration capacitor CINT is also arranged at the output of amplifier-comparator 4, if the amplifier-comparator output signal is in the form of a current. Adaptation signal VAGC is supplied to first drive component 6 to adapt the gain of input amplifier 2 immediately, and to second drive component 7 to adapt the shunt resistance RIN.
The gain of input amplifier 2 is adapted in two different ways to a stable operating value, until the difference between the rectified voltage VP and the reference voltage VR becomes close to zero. However, adapting said shunt resistance RIN to a suitable attenuation value is relatively difficult to achieve in the configuration shown in FIG. 1, which is a drawback.
A second embodiment of this type of state of the art electronic circuit 1 is shown in FIG. 2, which is of similar design to the embodiment described above with reference to FIG. 1. In this case, input amplifier 2, which may be a VGA amplifier, has two inputs. The two inputs are arranged to receive a first input signal VIN+ and a second input signal VIN− which has a phase shift of 180° from first input signal VIN+. These input signals generally originate from signals picked up by an antenna and shaped in a conventional shaping stage.
The automatic control loop further includes an input amplifier 2, an automatic gain control unit 5, which may be formed of a peak detector and an amplifier-comparator as explained with reference to FIG. 1. The AGC unit supplies an adaptation signal VAGC to a first drive component 6, to immediately adapt the gain of input amplifier 2, and to a second drive component 7, to adapt shunt resistance RIN. In the example, this shunt resistance RIN is at least one MOS transistor, for example a PMOS transistor, whose drain is connected to the first input VIN+ and whose source is connected to the second input VIN−, and whose gate is controlled by the second drive component 7. Generally, it is difficult to adapt shunt resistance RIN smoothly, which can constitute a drawback of this type of input attenuation of the input amplifier. If the source resistance is Rs, the signal must be attenuated by factor RIN/(RIN+Rs).
Finally, a third embodiment of this type of state of the art electronic circuit 1 is shown in FIG. 3 with adjustment of the variable input resistance equivalent to a digital command which is a function of various reference voltage levels. Electronic circuit 1 includes an automatic gain control loop, whose principle is similar to that described with reference to FIGS. 1 and 2. The automatic gain control loop also includes input amplifier 2 with two inputs VIN+ and VIN−, and automatic gain control unit 5, which may be formed of a peak detector and an amplifier-comparator, as explained with reference to FIG. 1. The AGC unit supplies an adaptation voltage VAGC, which is compared to several reference levels VREF1, VREF2, VREFN in several hysteresis comparators 11, 12, 13. Several parallel shunt resistors RIN1, RIN2, RINN, which are each formed by a PMOS transistor, are connected via their drain and source, to the two inputs VIN+ and VIN−. These shunt resistances are each controlled by a corresponding comparator.
A digital command may thus be applied as a function of the N reference voltage levels VREF1, VREF2, VREFN to control the conduction or non-conduction of the N resistors as a function of the level of voltage VAGC. Thus, the input impedance achieved by placing the shunt resistances in parallel attenuates the input signals of input amplifier 2 over a very broad range. This allows much finer adjustment of the amplifier gain, compared to the use of a single comparator and a single PMOS transistor as shunt resistance. However, the input signal attenuation and thus the adaptation of the input amplifier gain are carried out at different voltage levels, which makes the adjustment complicated to perform. Moreover, this arrangement of comparators may not be suitable in all desired adaptation situations, which is a drawback.
US Patent Application No. 2009/0201091 A1 describes a controller circuit having an attenuator. This attenuator is connected to a polarisation circuit. The attenuator includes a shunt FET transistor, whose the source is connected to earth and the drain is connected to a node of a resistive path of the attenuator. The gate of the shunt transistor is connected to a gate and drain of a FET transistor of the polarisation circuit, whose the source is connected to earth. The arrangement of shunt transistor of polarisation circuit and the shunt transistor of the attenuator forms a current mirror. However nothing is provided for supplying a smooth attenuation in an input signal of an amplifier in an automatic gain control loop.
U.S. Pat. No. 4,839,611 describes an electronic circuit with an attenuator in input of an amplifier. The attenuator is controlled by an automatic gain control unit, which is connected between the amplifier output and a control input of the attenuator. The automatic gain control unit supplies a control voltage to the attenuator according to an output voltage of the amplifier to adjust proportionally the input voltage of the amplifier. The attenuator is mainly a passive attenuator continuously variable with a resistive element on a path of an input signal of the amplifier. However nothing is provided for supplying a smooth attenuation of an input signal of an amplifier in an automatic gain control loop as a function of a comparison between an amplifier output level and a reference signal.
WO Patent Application No. 2011/080536 A1 describes an arrangement of transistors, which can be controlled by a control voltage in order to adapt the resistive value of an input resistance for example the input resistance of an amplifier. However nothing is described on the manner to supply a smooth attenuation to the amplifier input as a function of an amplifier output level.